This paper presents the design and testing of a low-noise programmable voltage source.\nSuch a piece of instrumentation is often required as part of the measurement setup needed to test\nelectronic devices without introducing noise from the power supply (such as photodetectors, resistors\nor transistors). Although its construction is based on known configurations, here the discussion\nis focused on the characterization and the minimization of the output noise, especially at very\nlow frequencies. The design relies on a digital-to-analog converter, proper lowpass filters, and a\nlow-noise Junction Field-Effect Transistors (JFET) based voltage follower.
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